Qrack
1.7
General classicalemulatingquantum development framework

Functions  
virtual void  Qrack::QEngineCPU::ZeroPhaseFlip (bitLenInt start, bitLenInt length) 
For chips with a zero flag, flip the phase of the state where the register equals zero. More...  
virtual void  Qrack::QEngineCPU::CPhaseFlipIfLess (bitCapInt greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex) 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation. More...  
virtual void  Qrack::QEngineCPU::PhaseFlip () 
Phase flip always  equivalent to Z X Z X on any bit in the QEngineCPU. More...  
virtual void  Qrack::QEngineCPU::SetPermutation (bitCapInt perm) 
Set to a specific permutation. More...  
virtual bitCapInt  Qrack::QEngineCPU::MReg (bitLenInt start, bitLenInt length) 
Measure permutation state of a register. More...  
virtual bitCapInt  Qrack::QEngineCPU::IndexedLDA (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, unsigned char *values) 
Set 8 bit register bits based on read from classical memory. More...  
virtual bitCapInt  Qrack::QEngineCPU::IndexedADC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values) 
Add based on an indexed load from classical memory. More...  
virtual bitCapInt  Qrack::QEngineCPU::IndexedSBC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values) 
Subtract based on an indexed load from classical memory. More...  
virtual void  Qrack::QEngineCPU::Swap (bitLenInt start1, bitLenInt start2, bitLenInt length) 
Bitwise swap. More...  
virtual void  Qrack::QInterface::QFT (bitLenInt start, bitLenInt length) 
Quantum Fourier Transform  Apply the quantum Fourier transform to the register. More...  
virtual void  Qrack::QInterface::ZeroPhaseFlip (bitLenInt start, bitLenInt length)=0 
Reverse the phase of the state where the register equals zero. More...  
virtual void  Qrack::QInterface::CPhaseFlipIfLess (bitCapInt greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex)=0 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation. More...  
virtual void  Qrack::QInterface::PhaseFlip ()=0 
Phase flip always  equivalent to Z X Z X on any bit in the QInterface. More...  
virtual void  Qrack::QInterface::SetReg (bitLenInt start, bitLenInt length, bitCapInt value) 
Set register bits to given permutation. More...  
virtual bitCapInt  Qrack::QInterface::MReg (bitLenInt start, bitLenInt length) 
Measure permutation state of a register. More...  
virtual bitCapInt  Qrack::QInterface::IndexedLDA (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, unsigned char *values)=0 
Set 8 bit register bits by a superposed indexoffsetbased read from classical memory. More...  
virtual bitCapInt  Qrack::QInterface::IndexedADC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values)=0 
Add to entangled 8 bit register state with a superposed indexoffsetbased read from classical memory. More...  
virtual bitCapInt  Qrack::QInterface::IndexedSBC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values)=0 
Subtract from an entangled 8 bit register state with a superposed indexoffsetbased read from classical memory. More...  
virtual void  Qrack::QInterface::Swap (bitLenInt qubitIndex1, bitLenInt qubitIndex2) 
Swap values of two bits in register. More...  
virtual void  Qrack::QInterface::Swap (bitLenInt start1, bitLenInt start2, bitLenInt length) 
Bitwise swap. More...  
virtual void  Qrack::QInterface::Reverse (bitLenInt first, bitLenInt last) 
Reverse all of the bits in a sequence. More...  
virtual void  Qrack::QUnit::ZeroPhaseFlip (bitLenInt start, bitLenInt length) 
Reverse the phase of the state where the register equals zero. More...  
virtual void  Qrack::QUnit::CPhaseFlipIfLess (bitCapInt greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex) 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation. More...  
virtual void  Qrack::QUnit::PhaseFlip () 
Phase flip always  equivalent to Z X Z X on any bit in the QInterface. More...  
virtual void  Qrack::QUnit::SetReg (bitLenInt start, bitLenInt length, bitCapInt value) 
Set register bits to given permutation. More...  
virtual bitCapInt  Qrack::QUnit::MReg (bitLenInt start, bitLenInt length) 
Measure permutation state of a register. More...  
virtual bitCapInt  Qrack::QUnit::IndexedLDA (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, unsigned char *values) 
Set 8 bit register bits by a superposed indexoffsetbased read from classical memory. More...  
virtual bitCapInt  Qrack::QUnit::IndexedADC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values) 
Add to entangled 8 bit register state with a superposed indexoffsetbased read from classical memory. More...  
virtual bitCapInt  Qrack::QUnit::IndexedSBC (bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, unsigned char *values) 
Subtract from an entangled 8 bit register state with a superposed indexoffsetbased read from classical memory. More...  
virtual void  Qrack::QUnit::Swap (bitLenInt qubit1, bitLenInt qubit2) 
Swap values of two bits in register. More...  

virtual 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation.
Implements Qrack::QInterface.

virtual 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation.
Implements Qrack::QInterface.

pure virtual 
The 6502 uses its carry flag also as a greaterthan/lessthan flag, for the CMP operation.
Implemented in Qrack::QEngineOCL, Qrack::QUnit, Qrack::QEngineOCLMulti, and Qrack::QEngineCPU.

virtual 
Add based on an indexed load from classical memory.
Implements Qrack::QInterface.

virtual 
Add to entangled 8 bit register state with a superposed indexoffsetbased read from classical memory.
inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits would usually already be entangled with the "inputStart" bits via a IndexedLDA() operation. With the "inputStart" bits being a "key" and the "outputStart" bits being a value, the permutation state key, value> is mapped to key, value + values[key]>. This is similar to classical parallel addition of two arrays. However, when either of the registers are measured, both registers will collapse into one random VALID keyvalue pair, with any addition or subtraction done to the "value." See IndexedLDA() for context.
FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM. "IndexedADC" and "IndexedSBC" perform add and subtract (with carry) operations on a state usually initially prepared with IndexedLDA().
Implements Qrack::QInterface.

pure virtual 
Add to entangled 8 bit register state with a superposed indexoffsetbased read from classical memory.
inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits would usually already be entangled with the "inputStart" bits via a IndexedLDA() operation. With the "inputStart" bits being a "key" and the "outputStart" bits being a value, the permutation state key, value> is mapped to key, value + values[key]>. This is similar to classical parallel addition of two arrays. However, when either of the registers are measured, both registers will collapse into one random VALID keyvalue pair, with any addition or subtraction done to the "value." See IndexedLDA() for context.
FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM. "IndexedADC" and "IndexedSBC" perform add and subtract (with carry) operations on a state usually initially prepared with IndexedLDA().
Implemented in Qrack::QUnit, Qrack::QEngineOCLMulti, Qrack::QEngineOCL, and Qrack::QEngineCPU.

virtual 
Set 8 bit register bits based on read from classical memory.
Implements Qrack::QInterface.

virtual 
Set 8 bit register bits by a superposed indexoffsetbased read from classical memory.
"inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits are first cleared, then the separable input, 00000000> permutation state is mapped to input, values[input]>, with "values[input]" placed in the "outputStart" register. FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM.
The physical motivation for this addressing mode can be explained as follows: say that we have a superconducting quantum interface device (SQUID) based chip. SQUIDs have already been demonstrated passing coherently superposed electrical currents. In a sufficiently quantummechanically isolated qubit chip with a classical cache, with both classical RAM and registers likely cryogenically isolated from the environment, SQUIDs could (hopefully) pass coherently superposed electrical currents into the classical RAM cache to load values into a qubit register. The state loaded would be a superposition of the values of all RAM to which coherently superposed electrical currents were passed.
In qubit system similar to the MOS 6502, say we have qubitbased "accumulator" and "X index" registers, and say that we start with a superposed X index register. In (classical) X addressing mode, the X index register value acts an offset into RAM from a specified starting address. The X addressing mode of a LoaD Accumulator (LDA) instruction, by the physical mechanism described above, should load the accumulator in quantum parallel with the values of every different address of RAM pointed to in superposition by the X index register. The superposed values in the accumulator are entangled with those in the X index register, by way of whatever values the classical RAM pointed to by X held at the time of the load. (If the RAM at index "36" held an unsigned char value of "27," then the value "36" in the X index register becomes entangled with the value "27" in the accumulator, and so on in quantum parallel for all superposed values of the X index register, at once.) If the X index register or accumulator are then measured, the two registers will both always collapse into a random but valid keyvalue pair of X index offset and value at that classical RAM address.
Note that a "superposed store operation in classical RAM" is not possible by analagous reasoning. Classical RAM would become entangled with both the accumulator and the X register. When the state of the registers was collapsed, we would find that only one "store" operation to a single memory address had actually been carried out, consistent with the address offset in the collapsed X register and the byte value in the collapsed accumulator. It would not be possible by this model to write in quantum parallel to more than one address of classical memory at a time.
Implements Qrack::QInterface.

pure virtual 
Set 8 bit register bits by a superposed indexoffsetbased read from classical memory.
"inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits are first cleared, then the separable input, 00000000> permutation state is mapped to input, values[input]>, with "values[input]" placed in the "outputStart" register. FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM.
The physical motivation for this addressing mode can be explained as follows: say that we have a superconducting quantum interface device (SQUID) based chip. SQUIDs have already been demonstrated passing coherently superposed electrical currents. In a sufficiently quantummechanically isolated qubit chip with a classical cache, with both classical RAM and registers likely cryogenically isolated from the environment, SQUIDs could (hopefully) pass coherently superposed electrical currents into the classical RAM cache to load values into a qubit register. The state loaded would be a superposition of the values of all RAM to which coherently superposed electrical currents were passed.
In qubit system similar to the MOS 6502, say we have qubitbased "accumulator" and "X index" registers, and say that we start with a superposed X index register. In (classical) X addressing mode, the X index register value acts an offset into RAM from a specified starting address. The X addressing mode of a LoaD Accumulator (LDA) instruction, by the physical mechanism described above, should load the accumulator in quantum parallel with the values of every different address of RAM pointed to in superposition by the X index register. The superposed values in the accumulator are entangled with those in the X index register, by way of whatever values the classical RAM pointed to by X held at the time of the load. (If the RAM at index "36" held an unsigned char value of "27," then the value "36" in the X index register becomes entangled with the value "27" in the accumulator, and so on in quantum parallel for all superposed values of the X index register, at once.) If the X index register or accumulator are then measured, the two registers will both always collapse into a random but valid keyvalue pair of X index offset and value at that classical RAM address.
Note that a "superposed store operation in classical RAM" is not possible by analagous reasoning. Classical RAM would become entangled with both the accumulator and the X register. When the state of the registers was collapsed, we would find that only one "store" operation to a single memory address had actually been carried out, consistent with the address offset in the collapsed X register and the byte value in the collapsed accumulator. It would not be possible by this model to write in quantum parallel to more than one address of classical memory at a time.
Implemented in Qrack::QUnit, Qrack::QEngineOCLMulti, Qrack::QEngineOCL, and Qrack::QEngineCPU.

virtual 
Subtract based on an indexed load from classical memory.
Implements Qrack::QInterface.

virtual 
Subtract from an entangled 8 bit register state with a superposed indexoffsetbased read from classical memory.
"inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits would usually already be entangled with the "inputStart" bits via a IndexedLDA() operation. With the "inputStart" bits being a "key" and the "outputStart" bits being a value, the permutation state key, value> is mapped to key, value  values[key]>. This is similar to classical parallel addition of two arrays. However, when either of the registers are measured, both registers will collapse into one random VALID keyvalue pair, with any addition or subtraction done to the "value." See QInterface::IndexedLDA for context.
FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM. "IndexedADC" and "IndexedSBC" perform add and subtract (with carry) operations on a state usually initially prepared with IndexedLDA().
Implements Qrack::QInterface.

pure virtual 
Subtract from an entangled 8 bit register state with a superposed indexoffsetbased read from classical memory.
"inputStart" is the start index of 8 qubits that act as an index into the 256 byte "values" array. The "outputStart" bits would usually already be entangled with the "inputStart" bits via a IndexedLDA() operation. With the "inputStart" bits being a "key" and the "outputStart" bits being a value, the permutation state key, value> is mapped to key, value  values[key]>. This is similar to classical parallel addition of two arrays. However, when either of the registers are measured, both registers will collapse into one random VALID keyvalue pair, with any addition or subtraction done to the "value." See QInterface::IndexedLDA for context.
FOR BEST EFFICIENCY, the "values" array should be allocated aligned to a 64byte boundary. (See the unit tests suite code for an example of how to align the allocation.)
While a QInterface represents an interacting set of qubitbased registers, or a virtual quantum chip, the registers need to interact in some way with (classical or quantum) RAM. IndexedLDA is a RAM access method similar to the X addressing mode of the MOS 6502 chip, if the X register can be in a state of coherent superposition when it loads from RAM. "IndexedADC" and "IndexedSBC" perform add and subtract (with carry) operations on a state usually initially prepared with IndexedLDA().
Implemented in Qrack::QUnit, Qrack::QEngineOCL, Qrack::QEngineOCLMulti, and Qrack::QEngineCPU.
Measure permutation state of a register.
Reimplemented from Qrack::QInterface.
Measure permutation state of a register.
Reimplemented from Qrack::QInterface.
Measure permutation state of a register.
Reimplemented in Qrack::QUnit, and Qrack::QEngineCPU.

virtual 
Phase flip always  equivalent to Z X Z X on any bit in the QEngineCPU.
Implements Qrack::QInterface.

virtual 
Phase flip always  equivalent to Z X Z X on any bit in the QInterface.
Implements Qrack::QInterface.

pure virtual 
Phase flip always  equivalent to Z X Z X on any bit in the QInterface.
Implemented in Qrack::QEngineOCL, Qrack::QUnit, Qrack::QEngineOCLMulti, and Qrack::QEngineCPU.
Quantum Fourier Transform  Apply the quantum Fourier transform to the register.
Reverse all of the bits in a sequence.

virtual 
Set to a specific permutation.
Implements Qrack::QInterface.
Set register bits to given permutation.
Reimplemented from Qrack::QInterface.
Set register bits to given permutation.
Reimplemented in Qrack::QUnit.
Bitwise swap.
Reimplemented from Qrack::QInterface.
Swap values of two bits in register.
Reimplemented from Qrack::QInterface.
Swap values of two bits in register.
Reimplemented in Qrack::QUnit, and Qrack::QEngineOCLMulti.
Bitwise swap.
Reimplemented in Qrack::QEngineOCLMulti, Qrack::QEngineCPU, and Qrack::QEngineOCL.
For chips with a zero flag, flip the phase of the state where the register equals zero.
Implements Qrack::QInterface.
Reverse the phase of the state where the register equals zero.
Implements Qrack::QInterface.
Reverse the phase of the state where the register equals zero.
Implemented in Qrack::QEngineOCL, Qrack::QUnit, Qrack::QEngineOCLMulti, and Qrack::QEngineCPU.