Qrack  9.13
General classical-emulating-quantum development framework
qengine_cpu.hpp
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1 //
3 // (C) Daniel Strano and the Qrack contributors 2017-2023. All rights reserved.
4 //
5 // This is a multithreaded, universal quantum register simulation, allowing
6 // (nonphysical) register cloning and direct measurement of probability and
7 // phase, to leverage what advantages classical emulation of qubits can have.
8 //
9 // Licensed under the GNU Lesser General Public License V3.
10 // See LICENSE.md in the project root or https://www.gnu.org/licenses/lgpl-3.0.en.html
11 // for details.
12 
13 #pragma once
14 
15 #include "qengine.hpp"
16 #include "statevector.hpp"
17 
18 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
19 #include "common/dispatchqueue.hpp"
20 #endif
21 
22 namespace Qrack {
23 
24 class QEngineCPU;
25 typedef std::shared_ptr<QEngineCPU> QEngineCPUPtr;
26 
27 template <class BidirectionalIterator>
28 void reverse(BidirectionalIterator first, BidirectionalIterator last, const bitCapInt& stride);
29 template <class BidirectionalIterator>
30 void rotate(
31  BidirectionalIterator first, BidirectionalIterator middle, BidirectionalIterator last, const bitCapInt& stride);
32 
36 class QEngineCPU : public QEngine {
37 protected:
39 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
40  DispatchQueue dispatchQueue;
41 #endif
42 
43  using QEngine::Copy;
44  void Copy(QInterfacePtr orig) { Copy(std::dynamic_pointer_cast<QEngineCPU>(orig)); }
45  void Copy(QEngineCPUPtr orig)
46  {
47  QEngine::Copy(std::dynamic_pointer_cast<QEngine>(orig));
48  stateVec = orig->stateVec;
49  }
50 
51 public:
52  QEngineCPU(bitLenInt qBitCount, const bitCapInt& initState, qrack_rand_gen_ptr rgp = nullptr,
53  const complex& phaseFac = CMPLX_DEFAULT_ARG, bool doNorm = false, bool randomGlobalPhase = true,
54  bool ignored = false, int64_t ignored2 = -1, bool useHardwareRNG = true, bool ignored3 = false,
55  real1_f norm_thresh = REAL1_EPSILON, std::vector<int64_t> ignored4 = {}, bitLenInt ignored5 = 0U,
56  real1_f ignored6 = _qrack_qunit_sep_thresh);
57 
58  ~QEngineCPU() { Dump(); }
59 
60  void Finish()
61  {
62 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
63  dispatchQueue.finish();
64 #endif
65  };
66 
67  bool isFinished()
68  {
69 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
70  return dispatchQueue.isFinished();
71 #else
72  return true;
73 #endif
74  }
75 
76  void Dump()
77  {
78 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
79  dispatchQueue.dump();
80 #endif
81  }
82 
83  void SetDevice(int64_t dID) {}
84 
86  {
87  if (!stateVec) {
88  return ZERO_R1_F;
89  }
90 
92  }
93 
95  {
96  Dump();
97  FreeStateVec();
99  }
100 
101  bool IsZeroAmplitude() { return !stateVec; }
102  void GetAmplitudePage(complex* pagePtr, bitCapIntOcl offset, bitCapIntOcl length);
103  void SetAmplitudePage(const complex* pagePtr, bitCapIntOcl offset, bitCapIntOcl length);
104  void SetAmplitudePage(
105  QEnginePtr pageEnginePtr, bitCapIntOcl srcOffset, bitCapIntOcl dstOffset, bitCapIntOcl length);
106  void ShuffleBuffers(QEnginePtr engine);
107  void CopyStateVec(QEnginePtr src);
108 
110 
111  void QueueSetDoNormalize(bool doNorm)
112  {
113  Dispatch(1U, [this, doNorm] { doNormalize = doNorm; });
114  }
115  void QueueSetRunningNorm(real1_f runningNrm)
116  {
117  Dispatch(1U, [this, runningNrm] { runningNorm = runningNrm; });
118  }
119 
120  void SetQuantumState(const complex* inputState);
121  void GetQuantumState(complex* outputState);
122  void GetProbs(real1* outputProbs);
123  complex GetAmplitude(const bitCapInt& perm);
124  void SetAmplitude(const bitCapInt& perm, const complex& amp);
125 
126  using QEngine::Compose;
128  bitLenInt Compose(QInterfacePtr toCopy) { return Compose(std::dynamic_pointer_cast<QEngineCPU>(toCopy)); }
129  std::map<QInterfacePtr, bitLenInt> Compose(std::vector<QInterfacePtr> toCopy);
130  bitLenInt Compose(QEngineCPUPtr toCopy, bitLenInt start);
132  {
133  return Compose(std::dynamic_pointer_cast<QEngineCPU>(toCopy), start);
134  }
135 
136  using QEngine::Decompose;
137  void Decompose(bitLenInt start, QInterfacePtr dest);
138 
139  void Dispose(bitLenInt start, bitLenInt length);
140  void Dispose(bitLenInt start, bitLenInt length, const bitCapInt& disposedPerm);
141 
142  using QEngine::Allocate;
143  bitLenInt Allocate(bitLenInt start, bitLenInt length);
144 
147  void XMask(const bitCapInt& mask);
148  void PhaseParity(real1_f radians, const bitCapInt& mask);
149  void PhaseRootNMask(bitLenInt n, const bitCapInt& mask);
150 
157  void ROL(bitLenInt shift, bitLenInt start, bitLenInt length);
158 #if ENABLE_ALU
159  void INC(const bitCapInt& toAdd, bitLenInt start, bitLenInt length);
160  void CINC(const bitCapInt& toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector<bitLenInt>& controls);
161  void INCS(const bitCapInt& toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex);
162 #if ENABLE_BCD
163  void INCBCD(const bitCapInt& toAdd, bitLenInt start, bitLenInt length);
164 #endif
165  void MUL(const bitCapInt& toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length);
166  void DIV(const bitCapInt& toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length);
167  void MULModNOut(
168  const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length);
169  void IMULModNOut(
170  const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length);
171  void POWModNOut(
172  const bitCapInt& base, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length);
173  void CMUL(const bitCapInt& toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length,
174  const std::vector<bitLenInt>& controls);
175  void CDIV(const bitCapInt& toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length,
176  const std::vector<bitLenInt>& controls);
177  void CMULModNOut(const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart,
178  bitLenInt length, const std::vector<bitLenInt>& controls);
179  void CIMULModNOut(const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart,
180  bitLenInt length, const std::vector<bitLenInt>& controls);
181  void CPOWModNOut(const bitCapInt& base, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart,
182  bitLenInt length, const std::vector<bitLenInt>& controls);
183  void FullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut);
184  void IFullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut);
185  bitCapInt IndexedLDA(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength,
186  const unsigned char* values, bool resetValue = true);
187  bitCapInt IndexedADC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength,
188  bitLenInt carryIndex, const unsigned char* values);
189  bitCapInt IndexedSBC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength,
190  bitLenInt carryIndex, const unsigned char* values);
191  void Hash(bitLenInt start, bitLenInt length, const unsigned char* values);
192  void CPhaseFlipIfLess(const bitCapInt& greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex);
193  void PhaseFlipIfLess(const bitCapInt& greaterPerm, bitLenInt start, bitLenInt length);
194 
196 #endif
197 
204  void SetPermutation(const bitCapInt& perm, const complex& phaseFac = CMPLX_DEFAULT_ARG);
206  void UniformlyControlledSingleBit(const std::vector<bitLenInt>& controls, bitLenInt qubitIndex,
207  const complex* mtrxs, const std::vector<bitCapInt>& mtrxSkipPowers, const bitCapInt& mtrxSkipValueMask);
208  void UniformParityRZ(const bitCapInt& mask, real1_f angle);
209  void CUniformParityRZ(const std::vector<bitLenInt>& controls, const bitCapInt& mask, real1_f angle);
210 
219  real1_f Prob(bitLenInt qubitIndex);
220  real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target);
221  real1_f ProbReg(bitLenInt start, bitLenInt length, const bitCapInt& permutation);
222  real1_f ProbMask(const bitCapInt& mask, const bitCapInt& permutation);
223  real1_f ProbParity(const bitCapInt& mask);
224  bitCapInt MAll();
225  bool ForceMParity(const bitCapInt& mask, bool result, bool doForce = true);
226  void NormalizeState(
227  real1_f nrm = REAL1_DEFAULT_ARG, real1_f norm_thresh = REAL1_DEFAULT_ARG, real1_f phaseArg = ZERO_R1_F);
228  real1_f SumSqrDiff(QInterfacePtr toCompare) { return SumSqrDiff(std::dynamic_pointer_cast<QEngineCPU>(toCompare)); }
229  real1_f SumSqrDiff(QEngineCPUPtr toCompare);
232 
235 protected:
236  real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength);
237 
240  void FreeStateVec(complex* sv = NULL) { stateVec = NULL; }
241 
242  void Dispatch(bitCapIntOcl workItemCount, DispatchFn fn)
243  {
244 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
245  if ((workItemCount >= pow2Ocl(GetPreferredConcurrencyPower())) && (workItemCount < GetStride())) {
246  dispatchQueue.dispatch(fn);
247  } else {
248  Finish();
249  fn();
250  }
251 #else
252  fn();
253 #endif
254  }
255 
256  void DecomposeDispose(bitLenInt start, bitLenInt length, QEngineCPUPtr dest);
257  void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, const complex* mtrx, bitLenInt bitCount,
258  const bitCapIntOcl* qPowersSorted, bool doCalcNorm, real1_f norm_thresh = REAL1_DEFAULT_ARG);
259  void UpdateRunningNorm(real1_f norm_thresh = REAL1_DEFAULT_ARG);
260  using QEngine::ApplyM;
261  void ApplyM(const bitCapInt& mask, const bitCapInt& result, const complex& nrm);
262 
263 #if ENABLE_ALU
264  void INCDECC(const bitCapInt& toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex);
265  void INCDECSC(const bitCapInt& toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex);
266  void INCDECSC(
267  const bitCapInt& toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt overflowIndex, bitLenInt carryIndex);
268 #if ENABLE_BCD
269  void INCDECBCDC(const bitCapInt& toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex);
270 #endif
271 
272  typedef std::function<bitCapIntOcl(const bitCapIntOcl&, const bitCapIntOcl&)> IOFn;
273  void MULDIV(const IOFn& inFn, const IOFn& outFn, const bitCapInt& toMul, const bitLenInt& inOutStart,
274  const bitLenInt& carryStart, const bitLenInt& length);
275  void CMULDIV(const IOFn& inFn, const IOFn& outFn, const bitCapInt& toMul, const bitLenInt& inOutStart,
276  const bitLenInt& carryStart, const bitLenInt& length, const std::vector<bitLenInt>& controls);
277 
278  typedef std::function<bitCapIntOcl(const bitCapIntOcl&)> MFn;
279  void ModNOut(const MFn& kernelFn, const bitCapInt& modN, const bitLenInt& inStart, const bitLenInt& outStart,
280  const bitLenInt& length, const bool& inverse = false);
281  void CModNOut(const MFn& kernelFn, const bitCapInt& modN, const bitLenInt& inStart, const bitLenInt& outStart,
282  const bitLenInt& length, const std::vector<bitLenInt>& controls, const bool& inverse = false);
283 #endif
284 };
285 } // namespace Qrack
Definition: dispatchqueue.hpp:33
void finish()
Definition: dispatchqueue.cpp:40
void dispatch(const DispatchFn &op)
Definition: dispatchqueue.cpp:66
void dump()
Definition: dispatchqueue.cpp:51
bool isFinished()
Definition: dispatchqueue.hpp:51
bitLenInt GetPreferredConcurrencyPower()
Definition: parallel_for.hpp:43
bitCapIntOcl GetStride()
Definition: parallel_for.hpp:42
General purpose QEngineCPU implementation.
Definition: qengine_cpu.hpp:36
void PhaseRootNMask(bitLenInt n, const bitCapInt &mask)
Masked PhaseRootN gate.
Definition: state.cpp:729
bool isFinished()
Returns "false" if asynchronous work is still running, and "true" if all previously dispatched asynch...
Definition: qengine_cpu.hpp:67
bitLenInt Compose(QEngineCPUPtr toCopy)
Combine (a copy of) another QEngineCPU with this one, after the last bit index of this one.
Definition: state.cpp:933
void DecomposeDispose(bitLenInt start, bitLenInt length, QEngineCPUPtr dest)
Minimally decompose a set of contigious bits from the separable unit.
Definition: state.cpp:1124
void Dispatch(bitCapIntOcl workItemCount, DispatchFn fn)
Definition: qengine_cpu.hpp:242
void QueueSetRunningNorm(real1_f runningNrm)
Add an operation to the (OpenCL) queue, to set the value of runningNorm, which is the normalization c...
Definition: qengine_cpu.hpp:115
complex GetAmplitude(const bitCapInt &perm)
Get the representational amplitude of a full permutation.
Definition: state.cpp:181
StateVectorPtr stateVec
Definition: qengine_cpu.hpp:38
void Copy(QInterfacePtr orig)
Definition: qengine_cpu.hpp:44
void ZeroAmplitudes()
Set all amplitudes to 0, and optionally temporarily deallocate state vector RAM.
Definition: qengine_cpu.hpp:94
void SetAmplitude(const bitCapInt &perm, const complex &amp)
Sets the representational amplitude of a full permutation.
Definition: state.cpp:197
void FreeStateVec(complex *sv=NULL)
Definition: qengine_cpu.hpp:240
QEnginePtr CloneEmpty()
Clone this QEngine's settings, with a zeroed state vector.
Definition: utility.cpp:34
virtual void ApplyM(const bitCapInt &qPower, bool result, const complex &nrm)
Definition: qengine.hpp:165
void CopyStateVec(QEnginePtr src)
Exactly copy the state vector of a different QEngine instance.
Definition: state.cpp:159
void UpdateRunningNorm(real1_f norm_thresh=REAL1_DEFAULT_ARG)
Force a calculation of the norm of the state vector, in order to make it unit length before the next ...
Definition: state.cpp:1722
void Dispose(bitLenInt start, bitLenInt length)
Minimally decompose a set of contiguous bits from the separably composed unit, and discard the separa...
Definition: state.cpp:1276
bitLenInt Compose(QInterfacePtr toCopy, bitLenInt start)
Compose() a QInterface peer, inserting its qubit into index order at start index.
Definition: qengine_cpu.hpp:131
void GetQuantumState(complex *outputState)
Get pure quantum state, in unsigned int permutation basis.
Definition: state.cpp:263
bitLenInt Compose(QInterfacePtr toCopy)
Combine another QInterface with this one, after the last bit index of this one.
Definition: qengine_cpu.hpp:128
void XMask(const bitCapInt &mask)
Masked X gate.
Definition: state.cpp:644
std::function< bitCapIntOcl(const bitCapIntOcl &, const bitCapIntOcl &)> IOFn
Definition: qengine_cpu.hpp:272
void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, const complex *mtrx, bitLenInt bitCount, const bitCapIntOcl *qPowersSorted, bool doCalcNorm, real1_f norm_thresh=REAL1_DEFAULT_ARG)
Definition: state.cpp:513
StateVectorPtr AllocStateVec(bitCapIntOcl elemCount)
Definition: state.cpp:1741
void GetProbs(real1 *outputProbs)
Get all probabilities, in unsigned int permutation basis.
Definition: state.cpp:279
QEngineCPU(bitLenInt qBitCount, const bitCapInt &initState, qrack_rand_gen_ptr rgp=nullptr, const complex &phaseFac=CMPLX_DEFAULT_ARG, bool doNorm=false, bool randomGlobalPhase=true, bool ignored=false, int64_t ignored2=-1, bool useHardwareRNG=true, bool ignored3=false, real1_f norm_thresh=REAL1_EPSILON, std::vector< int64_t > ignored4={}, bitLenInt ignored5=0U, real1_f ignored6=_qrack_qunit_sep_thresh)
Initialize a coherent unit with qBitCount number of bits, to initState unsigned integer permutation s...
Definition: state.cpp:35
void ResetStateVec(StateVectorPtr sv)
Definition: qengine_cpu.hpp:239
void ShuffleBuffers(QEnginePtr engine)
Swap the high half of this engine with the low half of another.
Definition: state.cpp:128
real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength)
Definition: utility.cpp:67
void CModNOut(const MFn &kernelFn, const bitCapInt &modN, const bitLenInt &inStart, const bitLenInt &outStart, const bitLenInt &length, const std::vector< bitLenInt > &controls, const bool &inverse=false)
Definition: arithmetic.cpp:609
std::function< bitCapIntOcl(const bitCapIntOcl &)> MFn
Definition: qengine_cpu.hpp:278
void Copy(QEngineCPUPtr orig)
Definition: qengine_cpu.hpp:45
~QEngineCPU()
Definition: qengine_cpu.hpp:58
void PhaseParity(real1_f radians, const bitCapInt &mask)
Parity phase gate.
Definition: state.cpp:685
void SetAmplitudePage(const complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)
Copy a "page" of amplitudes from pagePtr into this QEngine's internal state.
Definition: state.cpp:73
void MULDIV(const IOFn &inFn, const IOFn &outFn, const bitCapInt &toMul, const bitLenInt &inOutStart, const bitLenInt &carryStart, const bitLenInt &length)
Definition: arithmetic.cpp:360
virtual QInterfacePtr Decompose(bitLenInt start, bitLenInt length)
Definition: qengine.hpp:291
void INCDECC(const bitCapInt &toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: arithmetic.cpp:151
void CMULDIV(const IOFn &inFn, const IOFn &outFn, const bitCapInt &toMul, const bitLenInt &inOutStart, const bitLenInt &carryStart, const bitLenInt &length, const std::vector< bitLenInt > &controls)
Definition: arithmetic.cpp:425
bool IsZeroAmplitude()
Returns "true" only if amplitudes are all totally 0.
Definition: qengine_cpu.hpp:101
void QueueSetDoNormalize(bool doNorm)
Add an operation to the (OpenCL) queue, to set the value of doNormalize, which controls whether to au...
Definition: qengine_cpu.hpp:111
void GetAmplitudePage(complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)
Copy a "page" of amplitudes from this QEngine's internal state, into pagePtr.
Definition: state.cpp:59
void SetQuantumState(const complex *inputState)
Set arbitrary pure quantum state, in unsigned int permutation basis.
Definition: state.cpp:250
bitLenInt Allocate(bitLenInt start, bitLenInt length)
Allocate new "length" count of |0> state qubits at specified qubit index start position.
Definition: utility.cpp:52
real1_f FirstNonzeroPhase()
Get phase of lowest permutation nonzero amplitude.
Definition: qengine_cpu.hpp:85
void Dump()
If asynchronous work is still running, let the simulator know that it can be aborted.
Definition: qengine_cpu.hpp:76
void INCDECBCDC(const bitCapInt &toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Add BCD integer (without sign, with carry)
Definition: arithmetic.cpp:788
void INCDECSC(const bitCapInt &toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCSC and DECSC (without overflow flag)
Definition: arithmetic.cpp:252
void ModNOut(const MFn &kernelFn, const bitCapInt &modN, const bitLenInt &inStart, const bitLenInt &outStart, const bitLenInt &length, const bool &inverse=false)
Definition: arithmetic.cpp:533
void Finish()
If asynchronous work is still running, block until it finishes.
Definition: qengine_cpu.hpp:60
void SetDevice(int64_t dID)
Set GPU device ID.
Definition: qengine_cpu.hpp:83
Abstract QEngine implementation, for all "Schroedinger method" engines.
Definition: qengine.hpp:31
virtual void Copy(QInterfacePtr orig)
Copy this QInterface.
Definition: qinterface.hpp:222
virtual void ApplyM(const bitCapInt &qPower, bool result, const complex &nrm)
Definition: qengine.hpp:165
real1 runningNorm
The value stored in runningNorm should always be the total probability implied by the norm of all amp...
Definition: qengine.hpp:39
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual bitLenInt Allocate(bitLenInt length)
Allocate new "length" count of |0> state qubits at end of qubit index position.
Definition: qinterface.hpp:470
virtual bitLenInt Compose(QInterfacePtr toCopy)
Combine another QInterface with this one, after the last bit index of this one.
Definition: qinterface.hpp:364
bool doNormalize
Definition: qinterface.hpp:143
Half-precision floating-point type.
Definition: half.hpp:2222
void IMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:585
void DIV(const bitCapInt &toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length)
Divide by integer.
Definition: arithmetic.cpp:412
void IFullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut)
Inverse of FullAdd.
Definition: arithmetic.cpp:1308
void Hash(bitLenInt start, bitLenInt length, const unsigned char *values)
Transform a length of qubit register via lookup through a hash table.
Definition: arithmetic.cpp:1186
void CINC(const bitCapInt &toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: arithmetic.cpp:97
bitCapInt IndexedADC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, const unsigned char *values)
Add based on an indexed load from classical memory.
Definition: arithmetic.cpp:952
void INC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: arithmetic.cpp:61
void CPhaseFlipIfLess(const bitCapInt &greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex)
The 6502 uses its carry flag also as a greater-than/less-than flag, for the CMP operation.
Definition: arithmetic.cpp:1393
void CMUL(const bitCapInt &toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication by integer.
Definition: arithmetic.cpp:490
void CDIV(const bitCapInt &toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled division by power of integer.
Definition: arithmetic.cpp:513
void CIMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:691
void CMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:676
bitCapInt IndexedLDA(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, const unsigned char *values, bool resetValue=true)
Set 8 bit register bits based on read from classical memory.
Definition: arithmetic.cpp:882
void INCBCD(const bitCapInt &toAdd, bitLenInt start, bitLenInt length)
Add BCD integer (without sign)
Definition: arithmetic.cpp:719
void CPOWModNOut(const bitCapInt &base, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled, raise a classical base to a quantum power, modulo N, (out of place)
Definition: arithmetic.cpp:704
void POWModNOut(const bitCapInt &base, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Raise a classical base to a quantum power, modulo N, (out of place)
Definition: arithmetic.cpp:596
void PhaseFlipIfLess(const bitCapInt &greaterPerm, bitLenInt start, bitLenInt length)
This is an expedient for an adaptive Grover's search for a function's global minimum.
Definition: arithmetic.cpp:1418
void MUL(const bitCapInt &toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length)
Multiply by integer.
Definition: arithmetic.cpp:396
void FullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut)
Quantum analog of classical "Full Adder" gate.
Definition: arithmetic.cpp:1224
void INCS(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add an integer to the register, with sign and without carry.
Definition: arithmetic.cpp:202
void MULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:572
bitCapInt IndexedSBC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, const unsigned char *values)
Subtract based on an indexed load from classical memory.
Definition: arithmetic.cpp:1067
void ROL(bitLenInt shift, bitLenInt start, bitLenInt length)
"Circular shift left" - shift bits left, and carry last bits.
Definition: arithmetic.cpp:23
virtual void UniformlyControlledSingleBit(const std::vector< bitLenInt > &controls, bitLenInt qubit, const complex *mtrxs)
Apply a "uniformly controlled" arbitrary single bit unitary transformation.
Definition: qinterface.hpp:627
virtual void U(bitLenInt target, real1_f theta, real1_f phi, real1_f lambda)
General unitary gate.
Definition: rotational.cpp:18
void UniformlyControlledSingleBit(const std::vector< bitLenInt > &controls, bitLenInt qubitIndex, const complex *mtrxs, const std::vector< bitCapInt > &mtrxSkipPowers, const bitCapInt &mtrxSkipValueMask)
Definition: state.cpp:764
void CUniformParityRZ(const std::vector< bitLenInt > &controls, const bitCapInt &mask, real1_f angle)
If the controls are set and the target qubit set parity is odd, this applies a phase factor of .
Definition: state.cpp:890
void SetPermutation(const bitCapInt &perm, const complex &phaseFac=CMPLX_DEFAULT_ARG)
Set to a specific permutation of all qubits.
Definition: state.cpp:222
void UniformParityRZ(const bitCapInt &mask, real1_f angle)
If the target qubit set parity is odd, this applies a phase factor of .
Definition: state.cpp:870
real1_f ProbParity(const bitCapInt &mask)
Overall probability of any odd permutation of the masked set of bits.
Definition: state.cpp:1494
virtual real1_f FirstNonzeroPhase()
Get phase of lowest permutation nonzero amplitude.
Definition: qinterface.hpp:2985
real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target)
PSEUDO-QUANTUM Direct measure of bit probability to be in |1> state, if control is in |0>/|1>,...
Definition: state.cpp:1384
real1_f Prob(bitLenInt qubitIndex)
PSEUDO-QUANTUM Direct measure of bit probability to be in |1> state.
Definition: state.cpp:1322
bool ForceMParity(const bitCapInt &mask, bool result, bool doForce=true)
Act as if is a measurement of parity of the masked set of qubits was applied, except force the (usual...
Definition: state.cpp:1552
QInterfacePtr Clone()
Clone this QInterface.
Definition: utility.cpp:17
void NormalizeState(real1_f nrm=REAL1_DEFAULT_ARG, real1_f norm_thresh=REAL1_DEFAULT_ARG, real1_f phaseArg=ZERO_R1_F)
Apply the normalization factor found by UpdateRunningNorm() or on the fly by a single bit gate.
Definition: state.cpp:1672
QInterfacePtr Copy()
Copy this QInterface.
Definition: utility.cpp:44
bitCapInt MAll()
Measure permutation state of all coherent bits.
Definition: state.cpp:1528
real1_f ProbReg(bitLenInt start, bitLenInt length, const bitCapInt &permutation)
Direct measure of register permutation probability.
Definition: state.cpp:1428
real1_f ProbMask(const bitCapInt &mask, const bitCapInt &permutation)
Direct measure of masked permutation probability.
Definition: state.cpp:1455
real1_f SumSqrDiff(QInterfacePtr toCompare)
Calculates (1 - <\psi_e|\psi_c>) between states |\psi_c> and |\psi_e>.
Definition: qengine_cpu.hpp:228
GLOSSARY: bitLenInt - "bit-length integer" - unsigned integer ID of qubit position in register bitCap...
Definition: complex16x2simd.hpp:25
std::shared_ptr< QEngine > QEnginePtr
Definition: qrack_types.hpp:151
std::shared_ptr< QInterface > QInterfacePtr
Definition: qinterface.hpp:29
const real1_f _qrack_qunit_sep_thresh
Definition: qrack_functions.hpp:235
void rotate(BidirectionalIterator first, BidirectionalIterator middle, BidirectionalIterator last, const bitCapInt &stride)
std::function< void(void)> DispatchFn
Definition: dispatchqueue.hpp:31
std::complex< real1 > complex
Definition: qrack_types.hpp:128
std::shared_ptr< QEngineCPU > QEngineCPUPtr
Definition: qengine_cpu.hpp:24
QRACK_CONST real1 REAL1_EPSILON
Definition: qrack_types.hpp:200
QRACK_CONST real1 ZERO_R1
Definition: qrack_types.hpp:183
float real1_f
Definition: qrack_types.hpp:95
QRACK_CONST complex CMPLX_DEFAULT_ARG
Definition: qrack_types.hpp:257
std::shared_ptr< StateVector > StateVectorPtr
Definition: qrack_types.hpp:143
void reverse(BidirectionalIterator first, BidirectionalIterator last, const bitCapInt &stride)
bitCapIntOcl pow2Ocl(const bitLenInt &p)
Definition: qrack_functions.hpp:137
#define REAL1_DEFAULT_ARG
Definition: qrack_types.hpp:177
#define bitLenInt
Definition: qrack_types.hpp:38
#define ZERO_R1_F
Definition: qrack_types.hpp:160
#define qrack_rand_gen_ptr
Definition: qrack_types.hpp:156
#define bitCapInt
Definition: qrack_types.hpp:62
#define bitCapIntOcl
Definition: qrack_types.hpp:50